著書，編書，翻訳書

  1. 曽和将容, 範公可：論理回路（コンピュータサイエンス教科書シリーズ；コロナ社, 2013）.OPAC
  2. Van-Phuc Hoang and Cong-Kha Pham: Low Error, Efficient Fixed Width Squarer Using Hybrid LUT-based Architecture, in Advances in Electrical Engineering and Electrical Machines, edited by Dehuai Zeng, Lecture Notes in Electrical Engineering (LNEE) Springer, 134, 223-230 (2011).

学術雑誌

  1. Ba-Anh Dao, Trong-Thuc Hoang, Anh-Tien Le, Akira Tsukamoto, Kuniyasu Suzuki and Cong-Kha Pham: Exploiting the Back-Gate Biasing Technique as a Countermeasure Against Power Analysis Attacks, IEEE Access, 9, 24768-24786, (2021).IEEE
  2. Trong-Thuc Hoang, Ckristian Duran, Duc-Thinh Nguyen-Hoang, Duc-Hung Le, Akira Tsukamoto, Kuniyasu Suzuki and Cong-Kha Pham: Quick Boot of Trusted Execution Environment With Hardware Accelerators, IEEE Access, 8, 74015-74023, (2020).IEEE
  3. Trong-Thuc Hoang, Ckristian Duran, Khai-Duy Nguyen, Tuan-Kiet Dang, Quynh Nguyen Quang Nhu, Phuc Hong Than, Xuan-Tu Tran, Duc-Hung Le, Akira Tsukamoto, Kuniyasu Suzaki and Cong-Kha Pham: Low-power high-performance 32-bit RISC-V microcontroller on 65-nm silicon-on-thin-BOX (SOTB), IEICE Electronics Express, 17, 20, 1-6, (2020).J-STAGE
  4. Trong-Thuc Hoang, Xuan-Thuan Nguyen, Duc-Hung Le and Cong-Kha Pham: Low-Power Floating-Point Adaptive-CORDIC-Based FFT Twiddle Factor on 65-nm Silicon-on-Thin-BOX (SOTB) With Back-Gate Bias, IEEE Trans. Circuits and Systems II: Express Briefs, 66, 10, 1723-1727, (2019).IEEE
  5. Xuan-Thuan Nguyen, Trong-Thuc Hoang, Hong-Thu Nguyen, Katsumi Inoue and Cong-Kha Pham: An Efficient I/O Architecture for RAM-Based Content-Addressable Memory on FPGA, IEEE Trans. Circuits and Systems II: Express Briefs, 66, 3, 472-476, (2018).IEEE
  6. Hong-Thu Nguyen, Xuan-Thuan Nguyen and Cong-Kha Pham: A Low-Power Hybrid Adaptive CORDIC, IEEE Trans. Circuits and Systems II: Express Briefs, 65, 4, 496-500, (2018).IEEE
  7. Xuan-Thuan Nguyen, Trong-Thuc Hoang, Hong-Thu Nguyen, Katsumi Inoue and Cong-Kha Pham: An FPGA-Based Hardware Accelerator for Energy-Efficient Bitmap Index Creation, IEEE Access, 6, 16046-16059, (2018).IEEE
  8. Hong-Thu Nguyen, Xuan-Thuan Nguyen and Cong-Kha Pham: A High-Throughput Low-Energy Arithmetic Processor, IEICE Transactions on Electronics, E101.C, 4, 281-284, (2018).J-STAGE
  9. Katsumi Inoue, Trong-Thuc Hoang, and Cong-Kha Pham: Frequent items counter based on binary decoders, IEICE Electronics Express, 15, 20, 1-12, (2018).J-STAGE
  10. Trong-Thuc Hoang, Duc-Hung Le and Cong-Kha Pham: Minimum adder-delay architecture of 8/16/32-point DCT based on fixed-rotation adaptive CORDIC, IEICE Electronics Express, 15, 10, 1-12, (2018).J-STAGE
  11. Hong-Thu Nguyen, Xuan-Thuan Nguyen, Trong-Thuc Hoang, and Cong-Kha Pham: A CORDIC-based QR decomposition for MIMO signal detector, IEICE Electronics Express, 15, 6, 1-8, (2018).J-STAGE
  12. Hong-Thu Nguyen, Xuan-Thuan Nguyen, and Cong-Kha Pham: A Low-Latency Parallel Pipeline CORDIC, IEICE Transactions on Electronics, E100.C, 4, 391-398, (2018).J-STAGE
  13. Katsumi Inoue and Cong-Kha Pham: The Memorism Processor: Towards a Memory-Based Artificially Intelligence Complementing the von Neumann Architecture, SICE Journal of Control, Measurement, and System Integration, 10, 6, 544-550, (2017).CiNii
  14. Xuan-Thuan Nguyen, Hong-Thu Nguyen and Cong-Kha Pham: An FPGA approach for high-performance multi-match priority encoder, IEICE Electronics Express, 13, 13, 1-9, (2016).J-STAGE
  15. Xuan-Thuan Nguyen, Hong-Thu Nguyen and Cong-Kha Pham: An FPGA Approach for Fast Bitmap Indexing, IEICE Electronics Express, 13, 4, 1-9, (2016).J-STAGE
  16. Trong-Thuc HOANG, Xuan-Vy LUU, Hong-Kiet SU, Duc-Hung LE, Hieu-Binh NGUYEN, Hong-Thang NGUYEN, Huu-Thuan HUYNH, Trong-Tu BUI, Quan VU and Cong-Kha Pham: Design of Co-Processor for Real-Time HMM-Based Text-to-Speech on Hardware System Applied to Vietnamese, IEICE Electronics Express, 12, 14, 1-10 (2015).J-STAGE
  17. Koichiro Ishibashi, Nobuyuki Sugii, Shiro Kamohara, Kimiyoshi Usami, Hideharu Amano, Kazutoshi Kobayashi and Cong-Kha Pham: A Perpetuum Mobile 32bit CPU on 65nm SOTB CMOS Technology with Reverse-Body-Bias Assisted Sleep Mode, IEICE Trans. Electronics, E98-C, 7, 536-543 (2015).J-STAGE
  18. Hong-Thu Nguyen, Xuan-Thuan Nguyen, Trong-Thuc Hoang, Duc-Hung Le and Cong-Kha Pham: Low-resource low-latency hybrid adaptive CORDIC with floating-point precision, IEICE Electronics Express, 12, 9, 1-12 (2015).J-STAGE
  19. Duc-Hung Le, Katsumi Inoue and Cong-Kha Pham: A CAM-based Information Detection Hardware System for Fast Image Matching on FPGA Volume and Number: IEICE Trans. Electronics, E97-C, 1, 65-76 (2014).J-STAGE
  20. Xuan-Thuan NGUYEN, Trong-Tu BUI, Huu-Thuan HUYNH, Cong-Kha Pham and Duc-Hung LE: An ASIC Implementation of 16-Bit Fixed-Point Digital Signal Processor, Journal of Science and Technology, 51, 4B, 282-289 (2013).ResearchGate
  21. Duc-Hung Le, Katsumi Inoue and Cong-Kha Pham: Design a Fast CAM-based Exact Pattern Matching System on FPGA and 0.18um CMOS process, IEICE Trans. Fundamentals, E96-A, 9, 1883-1888 (2013).
  22. Duc-Hung Le, Katsumi Inoue, Masahiro Sowa and Cong-Kha Pham: An FPGA-based Information Detection Hardware System Employing Multi-Match Content Addressable Memory, IEICE Trans. Fundamentals, E95-A, 10, 1708-1717 (2012).J-STAGE
  23. Van-Phuc Hoang and Cong-Kha Pham: Low Complexity Logarithmic and Anti-Logarithmic Converters for Hybrid Number System Processors and DSP Applications, IEICE Trans. Fundamentals, E96-A, 2, 584-590 (2013).J-STAGE
  24. Van-Phuc Hoang and Cong-Kha Pham: An Improved Hybrid LUT-based Architecture for Low-Error and Efficient Fixed-Width Squarer, IEICE Trans. Fundamentals, E95-A, 7, 1180-1184 (2012).CiNii
  25. Van-Phuc Hoang and Cong-Kha Pham: Efficient LUT-Based Truncated Multiplier and its application in RGB to YCbCr Color Space Conversion, IEICE Trans. Fundamentals, E95.A, 6, 999-1006 (2012).J-STAGE
  26. Van-Phuc Hoang and Cong-Kha Pham: An Improved Linear Difference Method with High ROM Compression Ratio in Direct Digital Frequency Synthesizer, IEICE Trans. Fundamentals, E94.A, 3, 995-998 (2011).J-STAGE
  27. Heng Socheat and Cong-Kha Pham: A Low-Power High-PSRR Low-Dropout Regulator with Bulk-Gate Controlled Circuit, IEEE Trans. Circuits and Systems II: Express Briefs, 57, 4, 245-249 (2010).IEEE
  28. 柴田公男, 範 公可: 高速ソフトスタート制御回路を用いた電流モードDC-DCコンバータ,電子情報通信学会A論文誌, J93-A, 2, 127-135 (2010).CiNii
  29. 柴田公男, 範 公可: 電流モードDC-DCコンバータ用小型の適応型スロープ補償回路,電子情報通信学会A論文誌, J93-A, 1, 27-30 (2010).CiNii
  30. Socheat Heng and Cong-Kha Pham: A Low-Power High Accuracy Over Current Protection Circuit for Low Dropout Regulator, IEICE Trans. Electronics, E92-C, 9, 1208-1214 (2009).J-STAGE
  31. ヘイン　ソチェット, 範 公可: シリーズレギュレータが高速起動可能な突入電流制限回路の構成,電子情報通信学会A論文誌, J92-A, 7, 521-523 (2009).
  32. ヘイン　ソチェット, 範 公可: 低消費電力シリーズレギュレータ用の負荷過渡応答の高速化回路, 電子情報通信学会A論文誌, J92-A, 7, 470-476 (2009).CiNii
  33. 柴田 公男, 範 公可: 高精度アクティブ分圧回路,電子情報通信学会A論文誌, J91-A, 9, 919-922 (2008).CiNii
  34. 原田 津, 範 公可: 高速かつ低消費電力な全加算器,電子情報通信学会A論文誌, J91-A, 9, 915-918 (2008).CiNii
  35. ヘイン　ソチェット, 範 公可: シリーズレギュレータの低消費電力化による電源電圧のリプル除去率(PSRR)の劣化の改善,電子情報通信学会A論文誌, J91-A, 4, 535-537 (2008).CiNii
  36. ヘイン　ソチェット, 範 公可: ボンディングワイヤの抵抗を考慮したシリーズレギュレータの負荷安定のための補正回路, 電子情報通信学会A論文誌, J91-A, 1, 172-175 (2008).CiNii
  37. 範 公可: コンパクトなハミング重み比較回路, 電子情報通信学会A論文誌, J90-A, 10, 762-766 (2007).CiNii
  38. 範 公可, 高橋　俊太郎: 最適設計による高速かつ小規模なディジタル比較回路, 電子情報通信学会A論文誌, J90-A, 9, 727-730 (2007).CiNii
  39. ヘイン　ソチェット, 清水　麻里江, 範 公可: 低消費電力シリーズレギュレータ用の過電流保護回路,電子情報通信学会A論文誌, J90-A, 7, 619-621 (2007).CiNii
  40. Cong-Kha Pham and Watarru Noguchi: Solving Large N-Queen Problem with a Maximum Neuron Model by Canceling Diagonal Competition, Journal of Signal Processing, 11, 1, 25-32 (2007).
  41. Socheat Heng and Cong-Kha Pham: Low Power Full Input Range Current-Mode Operational Amplifier Using Level Shifter Technique, Journal of Signal Processing, 10, 6, 385-390 (2006).CiNii
  42. 野口 渉, 範 公可: マキシマムニューロン及び修正Hill-Climbing項を用いたN-Queen問題の解法, 電子情報通信学会A論文誌, J89-A, 11, 1012-1017 (2006).CiNii
  43. 柳沢 真, 範 公可:低消費電力全加算器, 電子情報通信学会A論文誌, J88-A, 10, 1163-1167 (2005).CiNii
  44. Cong-Kha Pham and Makoto Fukuda: A Stochastic Bit-Stream Digital Neuron Using Generalized LFSR and Its Application to Two-Dimensional Binary Classification, Journal of Signal Processing, 9, 5, 409-414 (2005).CiNii
  45. 東 裕貴，範 公可: 並列Generalized-LFSRを用いた自己組み込みテスト, 電子情報通信学会A論文誌, J87-A, 9, 1252-1253 (2004).
  46. Cong-Kha Pham: Implementation of a Novel CMOS Synapses Circuit, Journal of Signal Processing, 7, 1, 111-116 (2003).
  47. 範　公可: 新型CMOSシナプス回路, 電子情報通信学会A論文誌, J84-A, 2, 246-248 (2001).CiNii
  48. Cong-Kha Pham: A Neural-Based A/D Converter Using only CMOS Inverter, Journal of Signal Processing, 4, 1, 95-98 (2000).
  49. Cong-Kha Pham: Bifurcational Communication with Novel Chaotic Transistors Circuit, International Journal of Chaos Theory and Applications, 2, 2, 25-34 (1997).
  50. Cong-Kha Pham, M. Korehisa and M. Tanaka: Chaotic Behavior and Synchronization Phenomena in A Novel Chaotic Transistors Circuit, IEEE Trans. Circuit and Systems, I: Fundamental Theory and Applications, 43, 12, 1006-1011 (1996).IEEE
  51. Cong-Kha Pham, M. Ikegami and M. Tanaka: Discrete Time Cellular Neural Networks with Two Types of Neuron Circuits for Image Coding and Their VLSI Implementation, IEICE Trans. Fundamentals, E-78-A, 8, 291-299 (1995).
  52. Cong-Kha Pham, M. Tanaka and K. Shono: Chaotic Behavior in Simple looped MOS Inverters, IEICE Trans. Fundamentals, E-78-A, 3, 291-299 (1995).CiNii
  53. Cong-Kha Pham, M. Tanaka and K. Shono: A Hardware Accelerator for Design-Rule Checking in a Bit-Mapping CAD System: IEICE Trans. Fundamentals, E-76-A, 10, 1684-1693 (1993).CiNii
  54. Cong-Kha Pham and K. Shono: A CMOS Cell Compiler for a Bit-Mapping CAD System, IEICE Trans. Fundamentals, E-74, 9, 2603-2611 (1991).
  55. 高窪　統，ファム・コン・カー，庄野克房: 領域アクセスを行なうビットマップメモリバンク”電子情報通信学会C-II論文誌, J75-C-II, 4, 227-235 (1991).CiNii

国際会議プロシーディングス等

  1. Binh Kieu-Do-Nguyen, Cuong Pham-Quoc and Cong-Kha Pham: Heterogeneous Hardware-assisted Parallel Processing for BWA-MEM DNA Alignment, in Proc. RIVF International Conference on Computing and Communication Technologies, 1-7, (2020).IEEE
  2. Ngoc-Tu Bui, Trong-Thuc Hoang, Akinori, Yamamoto, Duc-Hung Le and Cong-Kha Pham: A 0.75-V 58-MHz 340-μW SOTB-65nm 32-point DCT Implementation Based on Fixed-rotation Adaptive CORDIC, in Proc. IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, 1-3, (2019).IEEE
  3. Akinori Yamamoto, Trong-Thuc Hoang, Duc-Hung Le and Cong-Kha Pham: A Ring Oscillator Using Bootstrap Inverter, in Proc. IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, 1-2, (2019).IEEE
  4. Thi-Tam Hoang, Thai-Ha Tran, Van-Phuc Hoang, Xuan-Nam Tran and Cong-Kha Pham: Hardware Trojan Detection Techniques Using Side-Channel Analysis, in Proc. 6th NAFOSTED Conference on Information and Computer Science, 528-533, (2019).IEEE
  5. Bien-Cuong Nguyen and Cong-Kha Pham: An Efficient Hardware Implementation of Radix-16 Montgomery Multiplication, in Proc. IEEE 8th Global Conference on Consumer Electronics, 1121-1122, (2019).IEEE
  6. Ngoc-Tu Bui, Trong-Thuc Hoang, Duc-Hung Le and Cong-Kha Pham: A 0.75-V 32-MHz 181-µW SOTB-65nm Floating-point Twiddle Factor Using Adaptive CORDIC, in Proc. IEEE International Conference on Industrial Technology, 835-840, (2019).IEEE
  7. Takahiro Hosaka, Trong-Thuc Hoang, Van-Phuc Hoang, Duc-Hung Le, Katsumi Inoue and Cong-Kha Pham: Live Demonstration: Real-Time Auto-Exposure Histogram Equalization Video-System Using Frequent Items Counter, in Proc. IEEE International Symposium on Circuits and Systems, 1-1, (2019).IEEE
  8. Xuan-Thuan Nguyen, Trong-Thuc Hoang, Katsumi Inoue, Ngoc-Tu Bui, Van-Phuc Hoang and Cong-Kha Pham: A 1.2-V 90-MHz Bitmap Index Creation Accelerator with 0.27-nW Standby Power on 65-nm Silicon-On-Thin-Box (SOTB) CMOS, in Proc. IEEE International Symposium on Circuits and Systems, 1-4, (2019).IEEE
  9. Trong-Thuc Hoang, Duc-Hung Le and Cong-Kha Pham: VLSI Design of Floating-Point Twiddle Factor Using Adaptive CORDIC on Various Iteration Limitations, in Proc. IEEE 12th International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 225-232, (2019).IEEE
  10. Katsumi Inoue, Trong-Thuc Hoang, Xuan-Thuan Nguyen, Hong-Thu Nguyen, and Cong-Kha Pham: VLSI Design of Frequent Items Counting Using Binary Decoders Applied to 8-bit per Item Case-study, in Proc. 14th Conference on Ph.D. Research in Microelectronics and Electronics, 161-164, (2019).IEEE
  11. Kesami Hagiwara, Tomoichi Hayashi, Shumpei Kawasaki, Fumio Arakawa, Oleg Endo, Hayato Nomura, Akira Tsukamoto, Duong Nguyen, Binh Nguyen, Anh Tran, Hoan Hyunh, Ikuo Kudoh and Cong-Kha Pham: A Two-Stage-Pipeline CPU of SH-2 Architecture Implemented on FPGA and SoC for IoT, Edge AI and Robotic Applications, in Proc. IEEE Symposium in Low-Power and High-Speed Chips, 1-3, (2019).IEEE
  12. Xuan-Thuan Nguyen, Trong-Thuc Hoang, Hong-Thu Nguyen, Katsumi Inoue and Cong-Kha Pham: A 219-μW 1D-to-2D-Based Priority Encoder on 65-nm SOTB CMOS, in Proc. International Symposium on Circuits and Systems, 1-4, (2019).IEEE
  13. Han-Le Duc, Van-Phuc Hoang, Duc-Minh Nguyen and Cong-Kha Pham: Hardware Implementation of Background Calibration Technique for TIADCs with Signals in Any Nyquist Bands, in Proc. IEEE International Symposium on Circuits and Systems, 1-4, (2019).IEEE
  14. Trong-Thuc Hoang, Cong-Kha Pham and Duc-Hung Le: High-Speed 8/16/32-Point DCT Architecture Using Fixed-Rotation Adaptive CORDIC, in Proc. IEEE International Symposium on Circuits and Systems 1-5, (2018).IEEE
  15. Hong-Thu Nguyen, Xuan-Thuan Nguyen and Cong-Kha Pham: An Efficient Fixed-Point Arithmetic Processor Using a Hybrid CORDIC Algorithm, in Proc. 23rd Asia and South Pacific Design Automation Conference, 327-328, (2019).IEEE
  16. Yuichiro Mori, Xuan-Thuan Nguyen and Cong-Kha Pham: Reliable and Energy-Efficient Transmission on the Internet-of-Video-Things, in Proc. 17th International Symposium on Communications and Information Technologies, 1-4, (2017).IEEE
  17. Nguyen Xuan Quyen and Cong-Kha Pham: Quadrature Multi-Carrier DCSK: A High-Efficiency Scheme for Radio Communications, in Proc. International Conference on Advanced Technologies for Communications, 186-191, (2017).IEEE
  18. Van-Phuc Hoang, Van-Tinh Nguyen, Anh-Thai Nguyen and Cong-Kha Pham: A Low Power AES-GCM Authenticated Encryption Core in 65nm SOTB CMOS Process, in Proc. IEEE 60th International Midwest Symposium on Circuits and Systems, 112-115, (2017).IEEE
  19. Trong-Thuc Hoang, Xuan-Thuan Nguyen, Hong-Thu Nguyen, Nhu-Quynh Truong, Duc-Hung Le, Katsumi Inoue and Cong-Kha Pham: FPGA-Based Frequent Items Counting Using Matrix of Equality Comparators, in Proc. IEEE 60th International Midwest Symposium on Circuits and Systems, 285-288, (2017).DOI Link
  20. Xuan-Thuan Nguyen, Hong-Thu Nguyen, Katsumi Inoue, Osamu Shimojo and Cong-Kha Pham: Highly Parallel Bitmap-Based Regular Expression Matching for Text Analytics, in Proc. IEEE International Symposium on Circuits and Systems, 1-4, (2017).IEEE
  21. Xuan-Thuan Nguyen, Hong-Thu Nguyen and Cong-Kha Pham: A Scalable High-Performance Priority Encoder Using 1D-Array to 2D-Array Conversion, in Proc. IEEE Transactions on Circuits and Systems II: Express Briefs, 1102-1106, (2017).IEEE
  22. Xuan-Thuan Nguyen, Hong-Thu Nguyen and Cong-Kha Pham: A 180-nm CMOS Bitmap-Index-Based Query Processor for Fast Data Analytics, in Proc. International Conference on Recent Advances in Signal Processing, Telecommunications & Computing, 155-157, (2017).IEEE
  23. Xuan-Thuan Nguyen, Hong-Thu Nguyen and Cong-Kha Pham: A High-Throughput Multi-Match Priority Encoder for Data Retrieval on 65-nm SOTB CMOS Process, in Proc. IEEE Region 10 Conference, 2392-2395, (2016).IEEE
  24. Keita Arai and Cong-Kha Pham: An All-Digital PLL with SAR Frequency Locking System in 65nm SOTB CMOS, in Proc. IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, 1-2, (2016).IEEE
  25. Xuan-Thuan Nguyen, Hong-Thu Nguyen and Cong-Kha Pham: A High-Performance Bitmap-Index-Based Query Processor on 65-nm SOTB CMOS Process, in Proc. IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, 1-4, (2016).IEEE
  26. Van-Phuc Hoang, Van-Lan Dao and Cong-Kha Pham: An Ultra-Low Power AES Encryption Core in 65nm SOTB CMOS Process, in Proc. International SoC Design Conference (ISOCC 2016), 90-91, (2016).IEEE
  27. Van-Phuc Hoang, Thi-Thanh-Dung Phan, Van-Lan Dao and Cong-Kha Pham: A Compact, Ultra-Low Power AES-CCM IP Core for Wireless Body Area Networks, in Proc. IFIP/IEEE International Conference on Very Large Scale Integration (VLSI-SoC 2016), 1-4, (2016).IEEE
  28. Trong-Thuc Hoang, Hong-Thu Nguyen, Xuan-Thuan Nguyen, Duc-Hung LE and Cong-Kha Pham: High-performance DCT Architecture Based on Angle Recoding CORDIC and Scale-free Factor, in Proc. IEEE International Conference on Communications and Electronics (ICCE 2016), 199-204, (2016).IEEE
  29. Xuan-Thuan Nguyen, Hong-Thu Nguyen and Cong-Kha Pham: A Bit-Level Matrix Transpose for Bitmap-Index-Based Data Analytics, in Proc. IEEE International Conference on Communications and Electronics (ICCE 2016), 1-4, (2016).IEEE
  30. Xuan-Thuan Nguyen, Hong-Thu Nguyen and Cong-Kha Pham: A High-Throughput and Low-Power Design for Bitmap Indexing on 65-nm SOTB CMOS, in Proc. IEEE International Conference on IC Design and Technology (ICICDT 2016), 1-4 (2016).IEEE
  31. Hong-Thu Nguyen, Xuan-Thuan Nguyen, Trong-Thuc Hoang, Duc-Hung Le and Cong-Kha Pham: A Hybrid Adaptive CORDIC in 65nm SOTB CMOS Process, in Proc. IEEE International Symposium on Circuits & Systems (ISCAS 2016), 2158-2161 (2016).IEEE
  32. Xuan-Thuan Nguyen, Hong-Thu Nguyen and Cong-Kha Pham: An Efficient FPGA-Based Database Processor for Fast Database Analytics, in Proc. IEEE International Symposium on Circuits & Systems (ISCAS 2016), 1758-1761 (2016).IEEE
  33. Vy-Long Dang, Binh-Son Le, Trong-Tu Bui, Huu-Thuan Huynh and Cong-Kha Pham: A Decentralized Localization Scheme for Swarm Robotics Based on Coordinate, in Proc. International Conference on Mechanical, Industrial and Manufacturing Technologies (MIMT 2016), 1-6 (2016).MATEC Conf.
  34. Hong-Thu Nguyen, Xuan-Thuan Nguyen, Trong-Thuc Hoang, Duc-Hung Le and Cong-Kha Pham: A Parallel Pipeline CORDIC based on Adaptive Angle Selection, in Proc. IEEE International Conference on Electronics, Information and Communication (ICEIC 2016), pp. 411-414 (2016).IEEE
  35. Hong-Thu Nguyen, Xuan-Thuan Nguyen, Trong-Thuc Hoang, Duc-Hung Le and Cong-Kha Pham: A Low-resource Low-latency Hybrid Adaptive CORDIC in 180-nm CMOS Technology, in Proc. International Technical Conference of IEEE Region 10 (TENCON 2015), 1-4 (2015).IEEE
  36. Duc-Hung Le, Nobuyuki Sugii, Shiro Kamohara, Hong-Thu Nguyen, Koichiro Ishibashi and Cong-Kha Pham: A 400mV 0.59mW Low-power CAM-based Pattern Matching System on 65nm SOTB Process, in Proc. International Technical Conference of IEEE Region 10 (TENCON 2015), 1-2, (2015).IEEE
  37. Tieu-Khanh Luong, Van-Phuc Hoang and Cong-Kha Pham: An FPGA Implementation of OFDM System for IEEE 802.22 WRAN, in Proc. International Conference on Integrated Circuits, Design and Verification (ICDV 2015), 104-107 (2015).
  38. Xuan-Thuan Nguyen, Hong-Thu Nguyen, Trong-Thuc Hoang, Katsumi Inoue, Osamu Shimojo, Toshio Murayama, Kenji Tominaga and Cong-Kha Pham: DataBase Processor (DBP) - A New Search Engine for the Big Data Era, in Proc. International Conference on Integrated Circuits, Design and Verification (ICDV 2015), 8-14 (2015).
  39. Xuan-Thuan Nguyen, Hong-Thu Nguyen and Cong-Kha Pham: SAR: A Self-Adaptive and Reliable Protocol for Wireless Multimedia Sensor Networks, in Proc. IEEE International Conference on Ubiquitous and Future Networks (ICUFN 2015), 760-765 (2015).IEEE
  40. Xuan-Thuan Nguyen, Hong-Thu Nguyen and Cong-Kha Pham: A Reliable Protocol for Multimedia Transmission Over Wireless Sensor Networks, in Proc. IEEE Conference on Ph.D. Research in Microelectronics & Electronics (PRIME 2015), 302-305 (2015).IEEE
  41. Duc-Hung Le, Nobuyuki Sugii, Shiro Kamohara, Xuan-Thuan Nguyen, Koichiro Ishibashi and Cong-Kha Pham: A Design of a Low-power Fixed-point 16-bit Digital Signal Processor Using 65nm SOTB Process, in Proc. IEEE International Conference on IC Design and Technology (ICICDT 2015), 1-4 (2015).IEEE
  42. Xuan-Thuan Nguyen, Hong-Thu Nguyen and Cong-Kha Pham: Parallel Pipelining Configurable Multi-Port Memory Controller for Multimedia Applications, in Proc. IEEE International Symposium on Circuits and Systems (ISCAS 2015), 2908-2911 (2015).IEEE
  43. Van Toan Nguyen, Huu Thuan Huynh and Cong-Kha Pham: Designing a High Performance Cryptographic System for Video Applications, in Proc. International Conference Integrated Circuits, Design and Verification (ICDV 2014), 56-61 (2014).
  44. Xuan-Thuan NGUYEN and Cong-Kha Pham: An efficient multi-port memory controller for multimedia applications, in Proc. Asia and South Pacific Design Automation Conference (ASP-DAC 2015), 12-13 (2015).IEEE
  45. Takumu Yomogita and Cong-Kha Pham: A 0.9V 200kHz Current-mode Successive Approximation Analog-to-Digital Converter in 0.18μm CMOS Technology, in Proc. International Conference Integrated Circuits, Design and Verification (ICDV 2014), 20-23 (2014).
  46. Xuan-Thuan NGUYEN and Cong-Kha Pham: An FPGA-based Multi-port Memory Controller for High Bandwidth Applications, in Proc. Joint conference 4S-2014/AVIC2014 (3st Solid-State Systems Symposium & VLSI & Related Technologies/17th International Conference on Analog VLSI Circuits), 240-245 (2014).
  47. Duc-Hung LE, Katsumi Inoue and Cong-Kha Pham: Design of a Parallel CAM-based Multi-Match Search System Using 0.18um CMOS Process, in Proc. IEEE International Conference on Communications and Electronics (ICCE 2014), 336-339 (2014).IEEE
  48. Takumu Yomogita, Nobuyuki Sugii, Shiro Kamohara, Koichiro Ishibashi and Cong-Kha Pham: A Circuit Structure for MOS Only R-2R Ladder DAC Having Higher Linearity, in Proc. IEEE International Conference on Communications and Electronics (ICCE 2014), 650-654 (2014).
  49. Koichiro Ishibashi, Nobuyuki Sugii, Kimiyoshi Usami, Hideharu Amano, Kazutoshi Kobayashi, Cong-Kha Pham, Hideki Makiyama, Yoshiki Yamamoto, Hirofumi Shinohara, Toshiaki Iwamatsu, Yasuo Yamaguchi, Hidekazu Oda, Takumi Hasegawa, Shinobu Okanishi, Hiroshi Yanagita, Shiro Kamohara, Masaru Kadoshima, Keiichi Maekawa, Tomohiro Yamashita, Duc-Hung Le, Takumu Yomogita, Masaru Kudo, Kuniaki Kitamori, Shuya Kondo and Yuuki Manzawa: A Perpetuum Mobile 32bit CPU with 13.4pJ/cycle, 0.14mA Sleep Current using Reverse Body Bias Assisted 65nm SOTB CMOS Technology, in Proc. IEEE Symposium on Low-Power and High-Speed Chips (COOL Chips XV), 8 (2014).IEEE
  50. Wei-Chun Tung, Nhat-Tan Mai, Duy-Tung Dao, Huu-Thuan Huynh and Cong-Kha Pham: Point-to-point H.264 Video Streaming over IEEE 802.15.4 with Reed-Solomon Error Correction, in Proc. International Conference on Green and Human Information Technology 2014 (ICGHIT 2014), 89-93 (2014).ResearchGate
  51. Koichiro Ishibashi, Nobuyuki Sugii and Cong-Kha Pham:(招待講演) Perpetuum-Mobile Sensor Network Systems using a CPU on 65nm SOTB CMOS Technology, in Proc. International Conference Integrated Circuits, Design and Verification (ICDV 2014), 1-2 (2014).
  52. Cong-Kha Pham, Trong-Tu Bui: (招待講演) VLSI Research and Education at HCMUS and Cooperation Research between UEC and HCMUS for IC Chips Implementations, IEICE Vietnam Section Lecture Meeting on ICT and Inauguration Ceremony, (2013).
  53. Thanh-Tri Vo, Duc-Hung Le, Cong-Kha Pham and Trong-Tu Bui: Power Reduction Methodologies for High-Speed Flash ADC Using 180 nm CMOS Process, in Proc. International Conference Integrated Circuits, Design and Verification (ICDV 2013), 46-51 (2013).
  54. Quang-Kien Trinh, Xuan-Tien Do, Van-Phuc Hoang, Thi-Thanh-Dung Phan and Cong-Kha Pham: A Compact Improved TDES Cryptography Module for Wearable Medical Devices, in Proc. International Conference Integrated Circuits, Design and Verification (ICDV 2013),79-82 (2013).
  55. Wei-Chun Tung, Hong-Thang Nguyen, Minh-Triet Luu, Cao-Quyen Tran, Huu-Thuan Huynh, Cong-Kha Pham and Kenzo Ozaki: Point-to-Point Real-time H.264 Video Streaming over IEEE 802.15.4, in Proc. International Conference Integrated Circuits, Design and Verification (ICDV 2013), 182-187 (2013)..
  56. Trung-Khanh Le, Duc-Hung Le, Cong-Kha Pham and Trong-Tu Bui: A Design of Differential Digital-Controlled Oscillator in a 0.18um CMOS Process, in Proc. International Conference Integrated Circuits, Design and Verification (ICDV 2013), 57-60 (2013).
  57. Hiroki Nagatomi, Le Duc-Hung, Cong-Kha Pham, Nobuyuki Sugii, Shirou Kamohara, Toshiaki Iwamatsu and Koichiro Ishibashi: A 4pA/Gate Sleep Current 65nm SOTB Logic Gates Using On-chip VBB Generator for Energy Harvesting Sensor Network Systems, in Proc. International Conference Integrated Circuits, Design and Verification (ICDV 2013), 42-45 (2013).
  58. Thanh-Tri Vo, Duc-Hung Le, Cong-Kha Pham and Trong-Tu Bui: Power Reduction Methodologies for High-Speed Flash ADC Using 180 nm CMOS Process, in Proc. International Conference Integrated Circuits, Design and Verification (ICDV 2013), 46-51 (2013).
  59. S. Morohashi, N. Sugii, T. Iwamatsu, S. Kamohara, Y. Kato, C-K. Pham and K. Ishibashi: A 44 W/10MHz Minimum Power Operation of 50K Logic Gate using 65nm SOTB Devices with Back Gate Control, in Proc. IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference, 1-2, (2013).
  60. Xuan-Thuan NGUYEN, Duc-Hung LE, Cong-Kha Pham, Trong-Tu BUI and Huu-Thuan HUYNH: An ASIC Implementation of 16-Bit Fixed-Point Digital Signal Processor, in Proc. International Conference on Advanced Computing and Applications (ACOMP 2013), 1-4, (2013).ResearchGate
  61. Van-Phuc HOANG, Xuan-Tien DO and Cong-Kha Pham: An Efficient ASIC Implementation of Logarithm Approximation for HDR Image Processing, in Proc. International Conference on Advanced Technologies for Communications (ATC 2013), 535-539 (2013).IEEE
  62. Duc-Hung Le, Tran-Bao-Thuong Cao, Katsumi Inoue and Cong-Kha Pham: A Cam-Based Information Detection Hardware System for Fast Exact Pattern Matching, in Proc. IEEE International Midwest Symposium on Circuits and Systems (MWSCAS 2013), 848-851 (2013).IEEE
  63. Duc-Hung Le, Katsumi Inoue and Cong-Kha Pham: Design a fast CAM-based Information Detection System on FPGA and 0.18um ASIC Technology, in Proc. IEEE International Conference on Electron Devices and Solid-State Circuits (EDSSC 2013), 1-2 (2013).IEEE
  64. Duc-Hung Le, Tran-Bao-Thuong Cao, Katsumi Inoue and Cong-Kha Pham: A Fast CAM-based Watermarking Extraction on FPGA, in Proc. IEEE International Conference on IC Design and Technology (ICICDT 2013), 207-210 (2013)..IEEE
  65. Duc-Hung Le, Tran-Bao-Thuong Cao, Katsumi Inoue and Cong-Kha Pham: A fast CAM-based Image Matching System on FPGA, in Proc. The IEEE International Symposium on Circuits and Systems (ISCAS 2013), 1797-1800 (2013).IEEE
  66. Phu-Quoc NGUYEN and Cong-Kha Pham: The New Structure of Time-to-Digital Converter (TDC) - Multi Diagonal Vernier based TDC, in Proc. Solid-State Systems Symposium-VLSI & Related Technologies (4S-2012), 119-122 (2012).
  67. Trung-Khanh LE, Trong-Tu BUI, Duc-Hung LE and Cong-Kha Pham: A Design of Three-Stage CMOS Opamp Using Indirect Feedback Compensation Technique, in Proc. Solid-State Systems Symposium-VLSI & Related Technologies (4S-2012), 153-156 (2012).
  68. Duc Hung Le, Tran Bao Thuong Cao, Katsumi Inoue and Cong-Kha Pham: A CAM-based Information Detection Hardware System for fast pattern matching on FPGA, in Proc. Solid-State Systems Symposium-VLSI & Related Technologies (4S-2012), 223-226 (2012).
  69. Van-Phuc Hoang and Cong-Kha Pham: Low-Error and Efficient Fixed-Width Squarer for Digital Signal Processing Applications, in Proc. IEEE International Conference on Communications and Electronics (ICCE 2012), (2012).IEEE
  70. Duc-Hung Le and Cong-Kha Pham: A Fully-Parallel Information Detection Hardware System Employing Content Addressable Memory, in Proc. IEEE International Conference on Communications and Electronics (ICCE 2012), 447-452 (2012) 最優秀論文賞.IEEE
  71. Duc-Hung Le and Cong-Kha Pham: Parameter extraction and optimization using Levenberg-Marquardt algorithm, in Proc. IEEE International Conference on Communications and Electronics (ICCE 2012), (2012).IEEE
  72. Xuan-Thuan Nguyen, QM-Dang-Do, Hoang-Dat Tran, Huu-Thuan Huynh and Cong-Kha Pham: A PCIe-based FFT Implementation for High-speed Spectrum Analysis, in Proc. International Conference Integrated Circuits and Devices in Vietnam (ICDV 2012), 126-131 (2012).
  73. Trung-Khanh LE, Trong-Tu BUI, Duc-Hung LE and Cong-Kha Pham: A Design of 16-bit Pi-Tpe DAC Employing Three-Stage Indirect Feedback Compensation Opamp, in Proc. International Conference Integrated Circuits and Devices in Vietnam (ICDV 2012), 64-68 (2012).
  74. Van-Phuc Hoang and Cong-Kha Pham: Novel Quasi-Symmetrical Approach for Efficient Logarithmic and Anti-logarithmic Converters, in Proc. IEEE Conference on Ph.D. Research in Microelectronics & Electronics (PRIME 2012), (2012).IEEE
  75. Duc-Hung Le and Cong-Kha Pham: A novel CAM-based Information Detection Hardware System on FPGA, in Proc. IEEE Conference on Ph.D. Research in Microelectronics & Electronics (PRIME 2012), (2012).IEEE
  76. Van-Phuc Hoang and Cong-Kha Pham: Low-Area, High-Speed Logarithmic and Anti-logarithmic Converters for Digital Signal Processors Based on Hybrid Number System, in Proc. IEEE Symposium on Low-Power and High-Speed Chips (COOL Chips XV), 8 (2012).
  77. Van-Phuc Hoang and Cong-Kha Pham: Low Error, Efficient Fixed Width Squarer Using Hybrid LUT-based Architecture, in Proc. International Conference of Electrical and Electronics Engineering (ICEEE 2011), 223-230 (2011).
  78. Yuta Kato and Cong-Kha Pham: A Linearity Optimization Method for CMOS R-2R Ladder Network, in Proc. IEEJ International Analog VLSI Workshop, 1-4, (2011).
  79. Duc-Hung Le, K. Inoue, M. Sowa and Cong-Kha Pham: Implementation of Search-Less Information Detection based on Content Addressable Memory on FPGA, in Proc. International Conference of IEICE Integrated Circuits and Devices in Vietnam (ICDV 2011), 166-172 (2011).
  80. Nobuyuki Yokoyama and Cong-Kha Pham: A Constant-gm Rail-to-rail Operational Amplifier with Low-gain Variation and Its Analysis, in Proc. IEEJ International Analog VLSI Workshop, 1-4, (2011).
  81. Van-Phuc Hoang and Cong-Kha Pham: Efficient LUT-based Multiplier and Squarer for DSP Applications, in Proc. International Conference Integrated Circuits and Devices in Vietnam (ICDV 2011), 148-153 (2011).
  82. Le Duc-Hung, Pham Cong-Kha, Nguyen Thi Thien Trang, Bui Trong Tu: Parameter extraction and optimization using Levenberg-Maquardt and Genetic Algorithm, in Proc. Triangle Symposium on Advanced ICT (TriSAI 2011), 54-58 (2011).
  83. Xuan-Thuan Nguyen, Huu-Thuan Huynh and Cong-Kha Pham: An SoPC for Real-Time Motion Detection Using Spatial-Temporal Entropy, in Proc. International Conference of IEICE Integrated Circuits and Devices in Vietnam (ICDV 2011), 1-4, (2011).
  84. Kimio Shibata and Cong-Kha Pham: A Novel Soft-Start Control Circuit for Current-Mode DC-DC Converter, in Proc. International Conference on Solid State Device and Materials, 343-344 (2010).
  85. Minh-Hai Nguyen and Cong-Kha Pham: A Wide Frequency Range and Adjustable Duty Cycle CMOS Ring Voltage Controlled Oscillator, in Proc. International Conference on Communications and Electronics (ICCE 2010), 107-109, (2010).IEEE
  86. Van-Phuc Hoang and Cong-Kha Pham: Improved Linear Different Method for Sine ROM Compression in Direct Digital Frequency Synthesizer, in Proc. Solid-State Systems Symposium-VLSI & Related Technologies (4S-2010), 192-195 (2010).
  87. Kimio Shibata and Cong-Kha Pham: A DC-DC Converter Using a High Speed Soft-Start Control Circuit, in Proc. IEEE International Symposium on Circuits and Systems (ISCAS 2010), 833-836 (2010).IEEE
  88. Kimio Shibata and Cong-Kha Pham: A Compact Adaptive Slope Compensation Circuit for Current-Mode DC-DC Converter, in Proc. IEEE International Symposium on Circuits and Systems (ISCAS 2010), 1651-1654 (2010).IEEE
  89. Van-Phuc Hoang, Thi-Tam Hoang and Cong-Kha Pham: FPGA Implementation of a Direct Digital Synthesizer Using Pipelined CORDIC-Based Approach, in Proc. Triangle Symposium on Advanced ICT 2009 (TriSAI2009), 105-108 (2009).ResearchGate
  90. Socheat Heng and Cong-Kha Pham: Low Power LDO with Fast Load Transient Response Based on Quick Response Circuit, in Proc. IEEE International Symposium on Circuits and Systems (ISCAS 2009), 2529-2532 (2009).IEEE
  91. Socheat Heng and Cong-Kha Pham: Improvement of Power Supply Rejection Ratio of LDO Deteriorated by Reducing Power Consumption-Implementation and Experimental Results, in Proc. International Conference on IC Design & Technology (ICICDT 2009), 11-15, (2009).
  92. Socheat Heng and Cong-Kha Pham: A Low-Power High Accuracy Over Current Protection Circuit for Low Dropout Regulator, in Proc. International Symposium on VLSI Design, Automation & Test (VLSI-DAT2009), 47-51 (2009).J-STAGE
  93. Socheat Heng and Cong-Kha Pham: Improvement of Power Supply Rejection Ratio of LDO Deteriorated by Reducing Power Consumption, in Proc. International Conference on IC Design & Technology (ICICDT 2008), 43-46 (2008).IEEE
  94. Socheat Heng and Cong-Kha Pham: Quick Response Circuit for Low-Power LDO Voltage Regulators, in Proc. International Symposium on Communications and Information Technologies (ITCIS 2007), 28-33 (2007).IEEE
  95. Socheat Heng and Cong-Kha Pham: Compensated Circuit for Low Dropout Regulator Having Stable Load Regulation After Consideration of Bonding Wire Resistance, in Proc. European Conference on Circuit Theory and Design (ECCTD 2007), 120-123 (2007).IEEE
  96. Cong-Kha Pham and Koutaro Yamano: An Edge Extraction Method for Color Image Using Multiple-Valued LoG Filter and Color Space, in Proc. 6th IEEE/ACIS International Conference on Computer and Information Science (ICIS 2007), 658-662 (2007).IEEE
  97. Cong-Kha Pham: CMOS Schmitt Trigger Circuit with Controllable Hysteresis Using Logical Threshold Voltage Control Circuit, in Proc. 6th IEEE/ACIS International Conference on Computer and Information Science (ICIS 2007), 48-53 (2007).IEEE
  98. Do Toan and Cong-Kha Pham: Image Encryption Method Using Chaotic System Having Dynamic Initial Condition, in Proc. RISP International Workshop on Nonlinear Circuit and Signal Processing (NCSP 2007), 245-248 (2007).
  99. Tei Ko and Cong-Kha Pham: Rank Order Filter Using Analog Hamming Comparator, in Proc. RISP International Workshop on Nonlinear Circuit and Signal Processing (NCSP 2007), 105-108 (2007).
  100. Fu Qu and Cong-Kha Pham: A Compact Hamming Distance Detector, in Proc. RISP International Workshop on Nonlinear Circuit and Signal Processing (NCSP 2007), 37-40 (2007).
  101. Cong-Kha Pham: Simple Logic Threshold Conversion Circuits, in Proc. IEEE International Conference on Electronics, Circuits and Systems (ICECS 2006), 268-271 (2006).IEEE
  102. Cong-Kha Pham and Wataru Noguchi: A Hardware Accelerator for Solving The N-Queen Problem, in Proc. International Conference on Computational Intelligence (CI 2006), 146-151 (2006).ResearchGate
  103. Socheat Heng, Marie Shimizu and Cong-Kha Pham: An Over Current Protection Circuit for Low Power Load Dropout Regulator, in Proc. IEEJ International Analog VLSI Workshop, 1-4 (2006).
  104. Wataru Noguchi and Cong-Kha Pham: A Proposal to Solve N-Queens Problems Using Maximum Neuron with A Modified Hill-climbing Term, in Proc. International Joint Conference on Neural Networks (IJCNN 2006), 4986-4984 (2006).
  105. Socheat Heng and Cong-Kha Pham: A 1.5V Current-Mode Operational Amplifier Using Level Shifter Technique, in Proc. International Symposium on VLSI Design, Automation & Test (VLSI-DAT 2006), 291-294 (2006)..IEEE
  106. Yuji Kunida and Cong-Kha Pham: A Digital Comparator using Analog Operations, in Proc. RISP International Workshop on Nonlinear Circuit and Signal Processing (NCSP 2006), 397-400 (2006).
  107. Chau-Hai Huynh and Cong-Kha Pham: CPL-Based Low-Power Full Adder, in Proc. RISP International Workshop on Nonlinear Circuit and Signal Processing (NCSP 2006), 401-404 (2006).
  108. Socheat Heng and Cong-Kha Pham: A 1.2V Current-Mode Operational Amplifier Using Level Shifter Technique, in Proc. RISP International Workshop on Nonlinear Circuit and Signal Processing (NCSP 2006), 393-396 (2006).
  109. Fu Qu and Cong-Kha Pham: A Robust-Fragile Dual Watermarking System Based on Bilateral Filtering, in Proc. 2006 RISP International Workshop on Nonlinear Circuit and Signal Processing (NCSP 2006), 345-348 (2006).
  110. Wataru Noguchi and Cong-Kha Pham: An effective solving method for N-Queens problem, in Proc. RISP International Workshop on Nonlinear Circuit and Signal Processing (NCSP 2006), 321-324 (2006).
  111. Cong-Kha Pham and Hiroshi Yamashita: Tolerance on Geometrical Operation as an Attack to Watermarked JPEG Image, in Proc. International Conference on Knowledge-Based Intelligent Information & Engineering Systems, 1199-1204 (2005).Springer
  112. Thanh-Nhat Le and Cong-Kha Pham: A New N-Parallel Updating Method of the Hopfield-Type Neural Network for N-Queens Problem: in Proc. International Joint Conference on Neural Networks, 788-791 (2005).IEEE
  113. Makoto Yanagisawa and Cong-Kha Pham: Low Power Full Adder Cell using XNOR Circuit of Pass Transistor, in Proc. RISP International Workshop on Nonlinear Circuit and Signal Processing (NCSP 2005), 163-166 (2005).
  114. Cong-Kha Pham and Makoto Fukuda: A Pulse Model Neuron with High Accurate Calculation and Its Application to Two-dimensional Binary Classification, in Proc. Information Processing Conference (ISSNIP 2004), 411-416 (2004).IEEE
  115. Cong-Kha Pham and Makoto Fukuda: A Stochastic Pulse Bit-Stream with High Accurate Multiplication, in Proc. IEEE International Midwest Symposium on Circuits and Systems (MWSCAS 2004), III-93-III-96 (2004).IEEE
  116. Hiroshi Yamashita and Cong-Kha Pham: Improvement of Robustness on Embedding of Binary Data to JPEG Image: in Proc. RISP International Workshop on Nonlinear Circuit and Signal Processing (NCSP 2004), 65-68 (2004).
  117. Cong-Kha Pham: A Novel Synapses Circuit and Its Application to a Neural-Based A/D Converter, in Proc. IEEE International Symposium on Circuits and Systems (ISCAS 2001), 612-615 (2001).
  118. Y. Murakami, K. Kitakaze and Cong-Kha Pham: An Application of Genetic Algorithm to a Backward Evolution of Cellular Automata, in Proc. 1999 International Symposium on Nonlinear Theory and Its Applications, 327-330 (1999).
  119. Cong-Kha Pham: Simple Methods for Secure Communications Using Nonlinear Mapping Function, in Proc. International Symposium on Nonlinear Theory and Its Applications, 101-103 (1997).
  120. Cong-Kha Pham and M. Tanaka: Bifurcational Communication with Novel Chaotic Transistors Circuits, in Proc. International Symposium on Circuits and Systems (ISCAS 1996), 100-103 (1996).IEEE
  121. Cong-Kha Pham, M. Tanaka and K. Shono: A Simple 6-bit Neural-Based A/D Converter Employing Only CMOS Inverters, in Proc. IEEE International Symposium on Circuits and Systems (ISCAS 1996), 357-360 (1996).IEEE
  122. Cong-Kha Pham and M. Tanaka: Implementation of nonlinear circuits employing MOSIS, in Proc. International Symposium on Nonlinear Theory and Applications, 1-4, (1995).
  123. Cong-Kha Pham, T. Kimura, M. Ikegami and M. Tanaka: Pulse Coded Cellular Neural Network and Its Hardware Implementation, in Proc. IEEE International Conference on Neural Networks (ICNN 1995), 1590-1594 (1995).IEEE
  124. Cong-Kha Pham, M. Korehisa and M. Tanaka: A Simple Chaos Generator and Its Nonlinear Analysis, in Proc. European Conference on Circuit Theory Design (ECCTD 1995), 1125-1128(1995).Link
  125. M. Kanaya, M. Takahira, T. Watanabe, Cong-Kha Pham and M. Tanaka: Asssociative Dynamics of Competitive Cellular Neural Network, in Proc. IEEE International Symposium on Circuits and Systems (ISCAS 1995), 1152-1155 (1995).
  126. Cong-Kha Pham and M. Tanaka: A Novel Chaos Generator Employing CMOS Inverter for Cellular Neural Networks, in Proc. IEEE International Workshop on Cellular Neural Networks and their Applications (CNNA 1994), 355 (1994).IEEE
  127. H. Numata, Cong-Kha Pham and M. Tanaka: Design of Dynamical Image Halftoning Processor, in Proc. Asian Pacific Conference on Hardware Description Languages (APCHDL 1994), 151-154 (1994).
  128. Cong-Kha Pham, M. Tanaka and K. Shono: A Simple Neural-Based A/D Converter Employing CMOS Inverters, in Proc. International Conference on Neural Networks (ICNN 1994), 2093-2096 (1994).IEEE
  129. Cong-Kha Pham, M. Tanaka and K. Shono: Bifurcation and Chaos in CMOS Inverters Ring Oscillator, in Proc. International Symposium on Circuits and Systems (ISCAS 1994), 697-700 (1994).IEEE
  130. M. Awata, Y. Nakamura, Cong-Kha Pham and M. Tanaka: Binocular Stereo Vision by Silicon Retina, in Proc. Australian Conference on Neural Networks, 125-128 (1994).
  131. Cong-Kha Pham, M. Ikegami and M. Tanaka: 2-bit Neuron Circuit for Cellular Neural Network, in Proc. International Symposium on Nonlinear Theory and its Applications, 1371-1374 (1993).
  132. K. Shono and Cong-Kha Pham: Design and Performance of CMOS Analog Fuzzy Chips, in Proc. International Conference on Industrial Fuzzy Control Intelligent Systems (IFIS 1993), 161-166 (1993).IEEE
  133. M. Tanaka, N. Shimizu, Cong-Kha Pham, M. Ikegami and Y. Nakamura: Pipelining System of Discrete Time Cellular Neural Networks for Information Coding and Decoding, in Proc. European Conference on Circuit Theory and Design (ECCTD 1993), 45-50 (1993).
  134. Cong-Kha Pham, M. Ikegami, M. Tanaka and K. Shono: CMOS Digital retina Chip with Multi-bit Neurons for Image Coding, in Proc. IEEE International Symposium on Circuits and Systems (ISCAS 1993), 2752-2755 (1993).IEEE
  135. Katsufusa Shono, Cong-Kha Pham and Shinichi Ooki: (招待講演) Fuzzy Processors using Neural Phenomena in CMOS Digital LSI, in Proc. International Conference on Fuzzy logic and Neural Networks, 17-22 (1992).

地域限定雑誌

  1. 野崎 眞次，範 公可:エレクトロニクス素子と集積の総合理解を目指す教育－研究・教育活性化支援システム教育プロジェクト－,電気通信大学紀要17, (2005).C-RECS

解説論文, レビュー論文

  1. 井上　克己，村山 俊生, 冨永 健嗣, NGUYEN XUAN THUAN, 範 公可: (招待講演) 超ビッグデータの検索や解析に最適なデータベースプロセッサ(DBP), 2015年電子情報通信学会ソサイエティ大会, (2015).

学会口頭発表, 未刊行論文

  1. 長岡 慶一，範 公可: 極低電圧用チャージポンプ回路, ITE technical report，映像情報メディア学会技術報告, 44, 17, 25-28 (2020).CiNii
  2. 山本 晃徳，範 公可: ブートストラップインバータを用いたRing-VCO, 信学技報，電子情報通信学会技術研究報告, 118, 337, 21-25 (2018).CiNii
  3. 井上 克己，範 公可: 招待講演 メモリズムプロセッサによる人工知能の課題解決, 信学技報，電子情報通信学会技術研究報告, 118, 10, 17-22 (2018).CiNii
  4. Nguyen Hong-Thu，Pham Cong-Kha: A Parallel Hybrid Adaptive CORDIC in 180 nm CMOS Technology,信学技報，電子情報通信学会技術研究報告, 116, 364, 101-104 (2016).CiNii
  5. 井上 克己，Nguyen Xuan-Thuan，範 公可: CK-2-6 ビッグデータの検索や解析に最適なデータベースプロセッサ(DBP)(CK-2.センサ応用技術とLSIによるセンサデータ処理解析技術,ソサイエティ特別企画,ソサイエティ企画),電子情報通信学会ソサイエティ大会講演論文集, "SS-15"-"SS-18" (2015).CiNii
  6. Ishibashi Koichiro，Sugii Nobuyuki，Usami Kimiyoshi，Amano Hideharu，Amano Hideharu，Kobayashi Kazutoshi，Pham Cong-Kha，Makiyama Hideki，Yamamoto Yoshiki，Shinohara Hirofumi，Iwamatsu Toshiaki，Yamaguchi Yasuo，Oda Hidekazu，Hasegawa Takumi，Okanishi Shinobu，Yanagita Hiroshi，Kamohara Shiro，Kadoshima Masaru，Maekawa Keiichi，Yamashita Tomohiro，Le Duc-Hung，Yomogita Takumu，Kudo Masaru，Kitamori Kuniaki，Kondo Shuya，Manzawa Yuuki: 招待講演 : A Perpetuum Mobile 32bit CPU with 13.4pJ/cycle, 0.14μA Sleep Current using Reverse-Body-Bias Assisted 65nm SOTB CMOS Technology,信学技報，電子情報通信学会技術研究報告, 114, 174, 1-4 (2014).CiNii
  7. 井上 克己，範 公可: 超高速なデータ検索を実現するデータベースプロセッサ(DBP) : メモリ型コンピューティングで情報処理を大きく進化革新, 信学技報，電子情報通信学会技術研究報告, 114, 13, 91-96 (2014).CiNii
  8. 蓬田 拓夢，範 公可: 0.18μm CMOS技術を用いた電流モード逐次比較型A/Dコンバータ, 信学技報，電子情報通信学会技術研究報告, 114, 345, 89-94 (2014).CiNii
  9. 大澤　衛，範 公可: クロスオーバー歪を抑えたAB級CMOS Rail-to-Railオペアンプに関する研究, 信学技報，電子情報通信学会技術研究報告, 114, 345, 101-105 (2014).CiNii
  10. 井上　克己,　レ ドゥクフン，曽和将容，範 公可: 集合演算プロセッサ(SOP) ― 画像認識への応用, 信学技報，電子情報通信学会技術研究報告, 113, 236, 35-40 (2013).CiNii
  11. 蓬田 拓夢，範 公可: MOSFETの動作領域の統一によるD/Aコンバータの線形性の向上, 信学技報，電子情報通信学会技術研究報告, 113, 173, 89-94 (2013).CiNii
  12. 大澤　衛，範 公可: バルク制御によるオペアンプの入力同相電圧広域化, 信学技報，電子情報通信学会技術研究報告, 113, 173, 105-110 (2013).CiNii
  13. 塚本洋介，範 公可: LCDドライバのためのRail-to-Rail電圧バッファ-低消費電力と高速化に向けて, 信学技報，電子情報通信学会技術研究報告, 111, 152, 47-52 (2011).CiNii
  14. 加藤 雄大，範 公可: CMOS R-2Rラダー回路のチャネル幅調整による線形性最適化に関する研究, 信学技報，電子情報通信学会技術研究報告, 110, 344, 59-63 (2010).CiNii
  15. ホアン ヴァン フック，範 公可: 低エラーのLUTによる打切り乗算器の設計, 信学技報，電子情報通信学会技術研究報告, 110, 344, 159-162 (2010).CiNii
  16. Fouzhiwei Tong，範 公可: 高速応答の低ドロップアウト(LDO)レギュレータに関する研究, 信学技報，電子情報通信学会技術研究報告, 110, 274, 29-33 (2010).CiNii
  17. ジャガトジョティ ギミレ，範 公可: Wide Swing, Low Gain Error Voltage Buffer with Adaptive Biasing for Improving Slew-rate, 信学技報，ICD2009-98,電子情報通信学会技術研究報告, 109, 336, 121-125 (2009).CiNii
  18. 張 品，範 公可: 入力電圧及び負荷変動に適応する効率且つシンプルなDC-DCコンバータ, 信学技報，ICD2009-102,電子情報通信学会技術研究報告, 109, 336, 145-149 (2009).CiNii
  19. 柴田公男，範 公可: 電流モード型DC-DCコンバータ用小型適応型スロープ補償回路, 信学技報，VLD2009-57, DC2009-44, 電子情報通信学会VLSI設計技術, ディペンダブルコンピューティング, システムLSI設計技術, コンピュータシステム, リコンフィギャラブルシステム, 集積回路, 電部品・材料, 109, 315,316, 107-111 (2009).CiNii
  20. Socheat HENG and Cong-Kha Pham: Inrush Current Limiting Circuit for Low Dropout Regulator, 2009年度第22回回路とシステム軽井沢ワークショップ, 355-360 (2009).CiNii
  21. 池本 真樹，範 公可: 可変相互コンダクタンス,非線形性,可変利得増幅器,演算トランスコンダクタンス, 信学技報，VLD2008-59,電子情報通信学会技術研究報告, 108, 224, 71-74 (2008).CiNii
  22. 高橋 俊太郎，範 公可: 64ビットディジタルコンパレータ,:信学技報，ICD2006-70, 電子情報通信学会集積回路/情報センシング研究会, 106, 189, 57-60 (2006).CiNii
  23. 山野公太郎，範公可: 可変閾値のラプラス－ガウスフィルタを用いた多値画像輪郭抽出法, 信学技報，SIP2005－85～95, 49-52 (2005).CiNii
  24. Christopher NTYANGIRI and Cong-Kha Pham: A Simple Differential Voltage Comparator, IEICE Technical Report, VLD2005-38, SDM 2005-157, STM05-02, 105, 307 (2005).CiNii
  25. Le Thanh Nhat, 範 公可: ニューロンの新準同期更新方法,電子情報通信学会ニューロコンピューティング研究会, 104, 502, 37-40 (2004).CiNii
  26. 渡辺 智是, 範 公可: カスタムプロセッサによるOgg Vorbisデコーダの実装, 2004度電子情報通信学会春季全国大会, C-12-16 (2004).CiNii
  27. 東 裕貴, 範公可: パラレルGLFSRを用いた自己組み込みテストにおける故障検出率の向上に関する研究, 電子情報通信学会回路とシステム研究会, CAS2003-83-89 (2003).CiNii
  28. 福田 真人, 範公可: 高精度乗算のための確立演算ビットストリム, 電子情報通信学会回路とシステム研究会, CAS2003-83-89, 5-8 (2003).CiNii
  29. 崔 巍, 範公可: FPGAを用いた大規模集積行列演算回路の実装に関する研究, 電子情報通信学会回路とシステム研究会, CAS2003-83-89, 1-4 (2003).CiNii
  30. 青山達也、範公可: 1補数を用いたパラレル乗算器の設計に関する研究, 2002度電子情報通信学会春季全国大会 (2003).CiNii
  31. 青山達也、範公可: FPGAを用いたパイプライン化FFTの設計及び実装に関する研究, 第６回システムLSIワークショップ, 231-233 (2002).
  32. ファム・コン・カー、伊久 信、田中 衞: カオティック・トランジスタ回路における同期現象, 1995年度電子情報通信学会春季全国大会 (1995).CiNii
  33. ファム・コン・カー、田中 衞、庄野 克房: カオティック・トランジスタ, 電子情報通信学会非線形問題研究会, NLP94-52, 91-98 (1994).CiNii
  34. ファム・コン・カー、田中 衞、庄野 克房: Chaotic Behavior in CMOS Inverters Ring, 1994年度第７回 回路とシステム軽井沢ワークショップ, 405-410 (1994).
  35. ファム・コン・カー、田中 衞、庄野 克房: Chaotic CMOS Inverters, 1994年度電子情報通信学会春季全国大会 (1994.3).
  36. ファム・コン・カー、田中 衞、庄野 克房: カオティックＣＭＯＳインバータ,電子情報通信学会非線形問題研究会, NLP93-80 (1994).CiNii
  37. ファム・コン・カー、池上 宗光、田中 衞、庄野 克房: CMOS Digital Retinal Chip with 1-bit Neurons for Image Coding, 1993年度電子情報通信学会春季全国大会 (1993).
  38. ファム・コン・カー、池上 宗光、田中 衞、庄野 克房: 濃淡画像を2値化するCMOS網膜チップ, 電子情報通信学会非線形問題研究会, NLP92-93, 17-22 (1993).
  39. 高窪 統、ファム・コン・カー、庄野 克房: 領域アクセスを行うビットマップメモリバンク, 第4回マイクロエレクトロニクスシンポジウムMES'91, 21-24 (1991).CiNii
  40. ファム・コン・カー、庄野 克房: アナログ・ディジタル・バランス回路を用いた逐次比較型Ａ／Ｄコンバータ, 1991年度電子情報通信学会春季全国大会 (1991).
  41. 高窪 統、ファム・コン・カー、庄野 克房: ビットマップ方式を取り入れたメモリバンク, 電子情報通信学会集積回路研究会, ICD90-38, 47-54 (1990).
  42. 高窪 統、ファム・コン・カー、庄野 克房: ビットマップ方式を取り入れたメモリバンク, 1990年度電子情報通信学会春季全国大会(1990).
  43. ファム・コン・カー、庄野 克房: CMOSディジタル・マクロセル・コンパイラ, 電子情報通信学会春季全国大会 (1990).
  44. 庄野 克房、姜 黎一、ファム・コン・カー: 教材としての２ビットマイクロコンピュータ-LSI Dry and Wet Laboratory-, マイクロエレクトロニクス研究開発機構リサーチコミュニケーション, 第3号 (1990).
  45. ファム・コン・カー、高窪 統、庄野 克房: 画像処理用ビットマップメモリバンク, 1989年度電子情報通信学会春季全国大会 (1989).
  46. 高窪 統、ファム・コン・カー、庄野 克房: ビットマップメモリバンクの設計, 電子情報通信学会集積回路研究会, CPSY87-48, 1-6 (1988).
  47. 高窪 統、山本 美奈、ファム・コン・カー、庄野 克房: ＶＴＬを用いた手書き論理回路図認識システム,電子情報通信学会集積回路研究会, ICD87-80, 19-24 (1987).
  48. ファム・コン・カー、庄野 克房: ビットアクセス用ＤＲＡＭコントローラの設計, 1987年度電子情報通信学会学生研究発表会 (1987).

特許申請

  1. 範 公可, 井上　克己,インデキシング方法、インデキシング装置、集積回路, 特願２０１３－２２９９０５, (2013).
  2. 範 公可, 井上　克己,曖昧さを含む情報の検出機能を備えた半導体及びこの半導体を組み込んだ装置, 特願２０１１－２０１４２５, (2011).
  3. 範 公可, 半導体集積装置, 特願2005-124239, (2005).
  4. 範 公可, 論理閾値変換方法及びその装置, 特願2005-111837, (2005).
  5. 範 公可, シナプス回路, 特願平P2001-18937, (2001).
  6. フアム コンカ,他,周波数制御による周期カオス発生回路, 特開平08-016688, (1994).
  7. フアム コンカ,他,ニューロンとニューラルネットワークの構成,特開平07-262292, (1993).

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